1. Field of the Invention
The present invention relates to a data processing apparatus which processes data as a result of executing a program including predetermined instructions, for example, to a CPU such as a microprocessor and a computer using a CPU.
2. Description of the Related Art
In a data processing apparatus such as a microprocessor, instructions of a program are executed one by one. Thus, data processing is performed. At this time, data on which an operation indicated by an instruction to be executed is to be performed is taken from a main memory as an operand. Ordinarily, an address is allocated in the main memory for each byte. When an operand is taken out, the address indicates the position of the main memory at which the operand is stored. For a microprocessor or the like, several addressing modes are prepared as address indicating methods. For example, in an absolute addressing mode an address is directly indicated by code data included in an instruction. In a displacement-adding register indirect addressing mode, an address is obtained as a result of a displacement being added to a value stored in a predetermined register. The displacement is indicated by an instruction. Each instruction included in a program for data processing includes data (hereinafter, referred to as `addressing data`) which indicates the address of an operand of the instruction.
The size of a program used for performing data processing in a microprocessor or the like is a large factor to determine evaluation of the microprocessor or the like. It is preferable that the size of a program required for a desired data processing is shorter. For this purpose, it is demanded to reduce the size of the above-mentioned addressing data included in each instruction of a program. However, by simply reducing the size of the addressing data, a range of addresses which can be indicated is reduced. Thereby, data which can be processed is limited, and flexibility of programing is degraded.